!UCDebug is an ARM debugger for RISC OS with a window-based interface, developed by the Computer Architecture and Technology Group at the the University of Cantabria, Spain.
!UCDebug allows to run codes in a controlled manner, displaying the behavior and changes in the register set and memory. A simple list of commands (and their syntax) can be found by typying "help" at the Console window of the debugger. !UCDebug runs in a Raspberry Pi 1B+ under version 5.24 of RISC OS (released on 16-April-2018). To properly visualize the debugger, a minimum screen resolution of 1366x768 (for widescreen monitors) or 1024x768 (for regular 4:3 monitors) is needed. A working copy of the application is provided for ease of use, as well as the full code. !UCDebug requires GCC4, OSLib and C shared libraries in order to compile. More information can be found in the README file in the code.
!UCDebug is distributed under the GPLv3 license.
We intend to upload full documentation and a comprehensive use guide very soon..
Developers and maintainers
!UCDebug has been co-developed by Cristóbal Camarero, Fernando Vallejo and Pablo Fuentes, as part of a project led by Carmen Martínez. Other current and former members of the group who have also collaborated include Jesús Gutiérrez, Elena Suárez and Adrián Barredo.
- Use of I/O SWIs brings I/O Console window to foreground. (v1.6.7)
- Paging errors during the execution of the user code are handled through RISC OS to prevent data aborts. (v1.6.6)
- Execution of undefined instructions warns the user instead of freezing the OS. (v1.6.5)
- Stopping at a breakpoint set by the user after a SWI displays a message to warn of the breakpoint reached. (v1.6.4)
- Resets of the scroll in the memory view windows (e.g., when loading a new executable file) do not force bring them to foreground. (v1.6.3)
- Execution of SWI 0x4 (OS_ReadC) does not abandon trace mode. (v1.6.3)
- Improved GUI: registers whose value changes during the execution are shown in red. Shifting forward and backwards the range shown in the memory views has a smaller gap. Loading a file or resetting the memory views resets their window scroll. (v1.6.2)
- Implemented 'go-fast' mode, which does not track the execution of every instruction in the user code, ensuring an execution time much closer to an execution outside the debugger. This feature is still in beta mode. (v1.6.2)
- Renamed previous 'go-fast' mode (run without stopping at breakpoints) as 'go-direct' ('gd' command). (v1.6.2)
- Debugger does not fail during the execution of certain misc. instructions (e.g., MSR). (v1.6.2)
- If the executable file does not have a data section, the 'Data' memory view starts displaying after the end of the code segment. (v1.6.2)
- Emulated SWIs that do not require GUI (e.g., OS_EnterOS) do not go back to the GUI to speed up the execution. (v1.6.1)
- Register values in privileged modes are now properly displayed. (v1.6.1)
- 'reg' command is now capable of updating the PC value. (v1.6.1)
- Prevented execution of out-of-range instructions. (v1.6.1)
- Execution properly controlled with instructions that update the PC. (v1.5.3)
- Catched the behavior of SWI 0x4 to prevent error affecting since v1.5. (v1.5.3)
- OS does not crash if user tries to load a folder instead of a file. (v1.5.2)
- Added IRQ handling routine to address the use of interrupts within user code (currently in development). (v1.5.1)
- Debugger does not throw segmentation fault if a SWI 0x2 in the user code receives an invalid address in R0. (v1.5.1)
- Added Makefile to compile faster. 'compile' file now switches to debugger folder and runs a 'make' command. (v1.5.1)
- Debugger does not crash if the stack from the user code is not aligned to a word. (v1.5.1)
- Set a dedicated stack for each mode, all located in the Debug area. (v1.5)
- Allowed to change register values when an Unknown mode is accessed. (v1.5)
- OS does not crash when trying to load non-existent files. (v1.5)
Known Bugs (v1.6.7)
- Execution of code in Abort mode is not stable (LR in this mode becomes polluted).
- 'Go-fast' mode is unstable and may behave unpredictably.